# Or Gate Using Nand Gates Only

It turns out that any logic gate can be emulated using only NAND gates or only NOR gates. NAND Logic Gate Value Calculator. So we can see that all the three basic gates can be made by only using NAND gates, that’s why this gate is called Universal Gate and it is appropriate. An entire processor can be created using NAND gates alone. What does connecting together the inputs of NAND and NOR gates do? Help produce multi-input gates; Produce and EXNOR gate; Produce a NOT gate; Damage the gate; 5. NAND and NOR gates are universal logic gates. Perform the following steps to obtain the minimum number of gates required: All the ANDed literals can be realized directly using a NAND gate each. The two-input NAND2 gate shown on the left is built from four transistors. Transmission delay is indicated by downward position of each NAND gate on the sheet. Let’s take a look at the symbol and the truth table. This can only be used as a gate when the signal strength in Input B is greater than or equal to that of Input A. Every example I look up makes sense when I step through it, but I'm not sure how to approach the problem from scratch. The NAND gate is a digital logic gate with ‘n’ i/ps and one o/p, that performs the operation of the AND gate followed by the operation of the NOT gate. The NOT operation is obtained from a two input NAND Gate. I have created a truth table using AND gates that seems to work properly. However there is another circuit that accomplishes the same task and requires only 6 NAND gates means fewer transistors and efficient design. Disadvantages of NOR and NAND gates? You can only upload files of type PNG, JPG, or JPEG. To simplify things, you may use AND, OR, NOT, and XOR gates in your diagram, with the following corresponding scores:. So let’s take our SR latch (NAND gates). A NAND gate is also referred as universal logic gate as all the binary operations can be realised by using only NAND gates. Sometimes, when using NAND gate ICs, you may not want to use all of a gate’s input terminals. Creating other logic gates by means of NAND gates is called NAND Implementation. According to many sources (for instance Wikipedia), it's possible to obtain XOR gate using 4 NAND gates. De Mergon’s second theorem says that the NAND gate is equivalent to a negative (bubbled) OR gate. Due to this property, NAND and NOR gates are sometimes called "universal gates". It is usually done using two AND gates, two Exclusive-OR gates and an OR gate, as shown in the Figure. It is an example of a universal gate - there are others. com - id: 3bdf71-ZDYzN. A similar process can be repeated using only OR gates. Tech- electronics and communication engineer. Skip to main content. Here is an argument against XOR and XNOR as universal gates. The main Boolean operators are AND, OR, NOT, and NAND (not AND); many combinations of these are possible as well. NOR: I think it's self explained. Create a NOT gate using only NAND gates. Now we will finally see how a NOT gate can be made by using only NOR gates. 2 Universal Gates: NAND Only Logic Design Introduction. Thus, Y is equal to ((A' nand B) nand (A nand B')). Objectives. • In fact, most gates are implemented in solid-state TTL chips (Transistor-Transistor Logic) – e. A pair of NAND gates will invert their inputs and the third NAND gate will combine two inputs. Another way to understand NAND logic gate: its output will only be at “0” when all its inputs are also at “1”. for an assignment I need to convert a circuit to NOR gates only circuit. And every gate does its own different logic function. The IC has four NAND gates in it. The OR gate has its own symbol. So now you know what the gates look like you can put the whole thing together: simulate this circuit. The function of optical logic OR gate using the combination of three NAND gates has been demonstrated as follows: (i) When A = 0, B = 0 and only the reference signal R = 1 with phase angle ϕ = 0 ° leads to logic “1” for both the outputs Y 1 and Y 2 of NAND gate 1 and NAND gate 2, respectively. For example, to form a NOT gate purely of NAND gates would one input to be in contact with the other, so that only one value (1 or 0) enters both of the inputs. A B B D C Z The system is made from an AND gate an OR gate and a NOT gate. Construction - variant 2 (second, other prototype, layout and schematics) Driving the 5th digits (optional, with wired-NAND gate), Power. So its output is complement of the output of an AND gate. Construction of NOT Gate using NOR Gate: For the NOT gate both the input terminal has been shorted which you can see in the figure drawn above since NOT has only one input. A LOW output results only if both the inputs to the gate are HIGH. Almost all the digital logic ciruits are built using basic logic gates such as AND and OR gates. According to many sources (for instance Wikipedia), it's possible to obtain XOR gate using 4 NAND gates. OR using 3 NAND's. 2 Half Adder using NAND Gates, 3 Half Adder using NOR Gates, 4 Limitations If A and B are binary inputs to the half adder, then the logic function to calculate. This article is about NAND Logic in the sense of building other logic gates using just NAND gates. Using NAND and NOR gates and De Morgan's Theorems different basic gates & EX-OR gates are realized. By using the binary number system, we can make sense of these numbers. So if AND, OR and NOT gates can be implemented using NAND gates only, then we prove our point. convert circuit to nor only gates. AND using 2 NAND's. Construction - variant 2 (second, other prototype, layout and schematics) Driving the 5th digits (optional, with wired-NAND gate), Power. If one/both of the original inputs are High, it will produce High output from the NAND gate. It produces a 0 output only when all the inputs are 1. While the CLK input is a logic 0, changes to the D input can only affect the state of the lower gate of the lower input latch circuit. If we take the example of a NAND gate, we find that it has two inputs and one output. This is the digital electronics questions and answers section on "Logic Gates" with explanation for various interview, competitive examination and entrance test. As a further simplification, these three gates can be reduced to a single gate, the NAND gate, a1 a2 a1 NAND a2 00 1 a NAND b ≡ NOT (a AND b) 0 1 1 (5) 10 1 11 0. Even more important is the fact that NAND and NOR are complete. For example, it is possible to build a circuit exhibiting the OR function using three interconnected NAND gates. This tutorial will give you an introduction to basic electronics for beginners. Each has only one transistor per input. we only have the true literals available, we can create inverters by connecting the inputs on a NAND gate. output) while NAND and NOR have only one bubble at the input side. The AND gate symbol is the NAND gate without the inverting circle at the output. Equipments - Digital IC Trainer Kit b. Multi level nand circuits quiz questions and answers, rather than and-or gates combinational circuits are made by, with answers for cisco certifications. Implementation of Half Adder using NAND gates : Total 5 NAND gates are required to implement half adder. The NAND gate and the NOR gate can be said to be universal gates since combinations of them can be used to accomplish any of the basic operations and can thus produce an inverter, an OR gate or an AND gate. Implementation of three basic gates using NAND and NOR gates is shown below -. This applet demonstrates the static two-input NAND and AND gates in CMOS technology. You can't derive an OR (or AND, NOR, NAND) gate from only XOR (or XNOR) gates, because they are not universal gates. Your task is to create a bit-counting comparator that takes a total of 16 A inputs and 4 B inputs (representing bits from 1 to 8), using only two-input NAND gates, and using as few NAND gates as possible. I just cant seem to figure out how to replace the OR gate with anything other than 3 NAND gates, which doesn't leave enough to replace the AND gates. All inputs are available both uncomplemented and complemented. In this NAND gate circuit diagram we are going to pull down both input of a gate to ground through a 1KΩ resistor. Two-level Logic using NAND Gates z Replace minterm AND gates with NAND gates z Place compensating inversion at inputs of OR gate CS 150 - Sringp 0012 - Combinational Implementionta - 4 Two-level Logic using NAND Gates (cont d) z OR gate with inverted inputs is a NAND gate y de Morgan's: A' + B' = (A B)' z Two-level NAND-NAND network. NAND gate is actually a combination of two logic gates: AND gate followed by NOT gate. 10: Image showing NAND Gate Symbol And Circuit. It produces a 1 output when any of the inputs is 0. Here we are using NAND gates for demonstrating the SR flip flop. Then copy and paste into your PreLab 2 worksheet. NAND gates in this chip can be reconfigured to make them NOT gate. Circuit Components/Equipments: 1. The logic output of NAND gate is low (FALSE) only when the inputs are high (TRUE). ) Fill in the table below, which describes the behavior of this logic circuit: Input Output F ? T ? Compare this table with the table above that describes a Not gate. Answer: Post Your Answer Add New Question. The diagrams I've seen for making an OR gate from a NAND gate use 3 NAND gates but if you have both inputs connected to both connectors of a NAND gate and then the output of this gate as inputs to both connectors of a second NAND gate it should behave like an OR gate. The function of the D-latch is as follows. You can't derive an OR (or AND, NOR, NAND) gate from only XOR (or XNOR) gates, because they are not universal gates. NAND and NOR are called universal gates as using only NAND or only NOR, any logic function can be implemented. Example of XOR Gate ICs given here. Solved examples with detailed answer description, explanation are given and it would be easy to understand - Page 13. pdf FREE PDF DOWNLOAD. It produces a 0 output only when all the inputs are 1. The circuit uses two cross coupled NAND gates which form an S-R latch, A SPDT (Single Pole Double Throw) switch, two pull up resistors. It produces a 1 output when any of the inputs is 0. In the previous tutorials, we saw that by using the three principal gates, the AND Gate, the OR Gate and the NOT Gate, we can build many other types of logic gate functions, such as a NAND Gate and a NOR Gate or any other type of digital logic function we can imagine. How can we prove this? (Proof for NAND gates) Any boolean function can be implemented using AND, OR and NOT gates. A low (0) output results only if both the inputs to the gate are high (1); if one or both inputs are low (0), a high (1) output results. F A’ C’ B’ D’ D’ A’ C B 3. In other words, any kind of Boolean function can be implemented using only NAND gates. My function is: \$\overline XZ + XY\$ H. Substituting one type of gate for another. Hence logic gates are named as AND gate, OR. For example, to form a NOT gate purely of NAND gates would one input to be in contact with the other, so that only one value (1 or 0) enters both of the inputs. Today, we are gonna have a look at some complex Logical Gates in Ladder Logic for PLC. AND/OR/NAND/NOR Gate. If the input of the NAND gate high, then the output of the gate will be low. Universal Gate –NAND I will demonstrate •The basic function of the NAND gate. I have a project work. shteii01 AAC Fanatic! Feb 19, 2010 4,653 742. This circuit is as basic as it gets for a NAND gate circuit and it. Create an AND gate using only NAND gates. We actually only need one type of logic gate: NAND or NOR. In all the other cases, its output is high. The ‘AC00 devices contain four independent 2-input NAND gates. • Transmission Gates • MUX Function using TGs b a b a (active & gate) –metal1 –via –metal2 only Metal 1 has 2-input NAND pMOS 2 parallel tx nMOS. if a neuron can implement this gate (or an approximation) then that proves a neural network is capable of. AND gate using NOR gate. // // I have also made multiplicators that are faster, more efficient, // use different gates, and multiply bigger numbers. This is a Diode-Transistor Logic (DTL) NAND Gate circuit using a bipolar junction transistor. NAND Gate Application. xor gate, now I need to construct this gate using only 4 nand gate. The circuit diagram of the NOR gate flip-flop is shown in the figure below. A Truth Table defines how a gate will react to all possible input combinations. when it comes to digital logic gates, you can make the component you need. The above diagram is of an OR gate made by only using NOR gates. The NOT operation is obtained from a two input NAND Gate. Another way to understand NAND logic gate: its output will only be at “0” when all its inputs are also at “1”. Next, change the AND gates to NAND, and add the inverter bubbles at the input of the OR gate to maintain the same functionality. Symbol of Exclusive OR (XOR) Gate is given here. OR, AND, NOT, NAND, NOR, XOR, XNOR - Logic Gates Calculation. We actually only need one type of logic gate: NAND or NOR. This is a Diode-Transistor Logic (DTL) NAND Gate circuit using a bipolar junction transistor. For this reason, many logic families will use a large number of NAND gates or a large number of NOR gates. With them the results obtained are either a complete “yes" or a complete “no. These gates are implemented using electronic switches like transistors, resistors, and diodes. In fact, many of the first designs available to work on will be other simple logic gates. A NAND gate is a truly versatile logic gate. In the Bedrock Edition, the redstone wire on the side of the comparator is replaced by a repeater facing the comparator. The Importance of NAND • NAND gates are considered to be the “universal” gate, because any other gate can be synthesized eve Engels, 2006 Slide 22 of 20 using NAND. The Logical symbol for the NAND gate is shown below - Fig. When you want logic inverter. In the AND type of gate, produces an output of "1" only when both inputs are "1", otherwise it produces a "0". Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the. Create an AND gate using only NAND gates. To achieve this, first the logic function has to be written in the sum of products (SOP) form. for an assignment I need to convert a circuit to NOR gates only circuit. Best Answer: Connect input A to a NAND gate, and input B to a separate NAND gate then connect the two outputs to a third NAND gate. Exclusive OR (XOR) Gate is Logical Gate which gives High Output signal when the no. This is the minimum number of NOR gates to design half adder. (i) Using NAND gates: Logic function is first written in SOP form. Half Adder Using Nor Gate; Full Adder. Let’s take a look at the symbol and the truth table. Not And gate is universal. The ‘AC00 devices contain four independent 2-input NAND gates. AND GATE USING DIODE AND gate using diodes in hindi Equivalent circuit of AND GATE logic gates POLYTECHNIC digital logic gates and gate truth table truth table KV or. Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the NOT gate. The outputs of all NAND gates are high if any of the inputs are low. It can be. gates like AND, OR, NOT, NAND & NOR etc. The ability for. more inputs using gates with fewer inputs, you cannot connect them using. This can only be used as a gate when the signal strength in Input B is greater than or equal to that of Input A. A NOT gate is made by joining the inputs of a NAND gate together. Implementation of Half Adder using NAND gates : Total 5 NAND gates are required to implement half adder. How can I make a XOR gate using 4 NAND gates? I would like to explain me the way you reach to the equation from which you form the circuit of the 4 gates. Find an answer to your question To implement y=abcd using only two input nand gates, minimum no. In all the other cases, its output is high. Q and Q are always opposites of each other in terms of logic state. a xor b = (a nand (a nand b)) nand (b nand (a nand b)) Digression: There is a story about certain military devices being designed using only NAND gates, so that only one part needs to be certified, stocked as spares, etc. In this simulation you can manipulate the inputs and see the inputs and outputs. It is usually done using two AND gates, two Exclusive-OR gates and an OR gate, as shown in the Figure. This tutorial covers the remaining gates, namely NAND, NOR, XOR and XNOR gates in VHDL. It is referred to as the universal logic gate chip. Implementation of Half Adder using NOR gates : Total 5 NOR gates are required to implement half adder. Here we shall see the realization of complex logic gates using these two universal gates. 1 Multi-Level Gate Circuits Levels: maximum number of gates cascaded in series between a circuit input and an output i. Full-Adder Using Nand gate; Full-Adder Using Nor Gate; Half Subtractor. It is the combination of AND Gate followed by NOT gate i. This page on AND vs NAND vs OR vs NOR gates mentions truth table and logic symbols of AND,NAND,OR and NOR gate. All inputs are available both uncomplemented and complemented. De Mergon’s second theorem says that the NAND gate is equivalent to a negative (bubbled) OR gate. This can be converted to NAND – NAND gates (Refer any text book) So the procedure is Write Boolean expression is SOP form. We have seen how NAND gate can be used to make all the three basic gates by using that alone. Previous GATE Questions on Logic Gates (1987 to Till Date) NAND gates only The output of a logic gate is '1' when all its inputs are at logic '0'. In this project, we will show how to build a D flip flop from NAND gates. Its popularity is based on the fact that any logic gate function can be created using only NAND gates. Circuit Diagram, Truth table and design of basic logic gates using NAND gate. If no specific XNOR gates are available, one can be made from four NOR gates or five NAND gates in the configurations shown below. Online logic gate calculator to calculate NAND gate value. The output of this gate is exactly similar to that of a single OR gate. Add a NAND gate for any product with only a single literal. Primary Logic Gates Using NAND Gate Only (in Hindi) 12:22. NAND gate 1000 may also be used for NAND gates 906, 908, and 910 so as to output substantially uniform decoded signals Q0-Q3. Truth Tables of Basic Logic Gates:. So these three gates are universal for classical Boolean logic. In the AND type of gate, produces an output of "1" only when both inputs are "1", otherwise it produces a "0". Full Adder using NAND gate only To construct a full adder circuit, we'll need three inputs and two outputs. A pair of NAND gates will invert their inputs and the third NAND gate will combine two inputs. OR using 3 NAND's. This can be quite useful, since NAND gates are relatively easy to manufacture. The function of the D-latch is as follows. NAND Gate The NAND gate is a combination of an AND gate and NOT gate. Only one type of gate is used in constructing the logic circuits which is an advantage in designing circuits. Using the circle symbols for inverting the inputs is another way to show the OR gate. De Mergon's second theorem says that the NAND gate is equivalent to a negative (bubbled) OR gate. Here we are using NAND gates for demonstrating the SR flip flop. Aim to study the construction of basic gates using NAND gates and NOR gates. In this project, we will build a simple NAND gate circuit using a 4011 quad NAND gate chip. Theory: AND, OR, NOT are called basic gates as their logical operation cannot be simplified further. Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the. Using DeMorgan's Law in di erent forms gates in the network can be successively converted to use only NAND's or only NOR's. • How a logic circuit implemented with AOI logic gates can be re-implemented using only NAND gates. shteii01 AAC Fanatic! Feb 19, 2010 4,653 742. Nand [disambiguation] | NAND. According to many sources (for instance Wikipedia), it's possible to obtain XOR gate using 4 NAND gates. In this article, we will explore the foundations on which a computer system process data. In practice, these gates are built from combinations of simpler logic gates. The OR gate is a little more complicated. Full-Adder Using Nand gate; Full-Adder Using Nor Gate; Half Subtractor. Universal Gate -NAND I will demonstrate •The basic function of the NAND gate. Suppose you want a high output when either A or B is high but C is low. The conversion from an AND/OR/NOT gate design to one that uses only NAND gates is straightforward: Express the function as a minimal SoP. As in truth table the output of a NAND gate should be low only if both the gate inputs are high. Design Half Subtractor Using Nand Gate. This means that every gate can be created by NAND or NOR gates only. 1 AnswerImplement a half adder using pla?1 AnswerShow that a full adder can be constructed using two half adders. In all the other cases, its output is high. In the previous tutorials, we saw that by using the three principal gates, the AND Gate, the OR Gate and the NOT Gate, we can build many other types of logic gate functions, such as a NAND Gate and a NOR Gate or any other type of digital logic function we can imagine. NAND and NOR Gates. It is also called a universal gate because combinations of it can be used to accomplish functions of other basic gates. AND logic operation can be performed by using two NAND gates, as shown in fig 5. The clock has to be high for the inputs to get active. • How a NAND gate can be used to replace an AND gate, an OR gate, or an INVERTER gate. I have created a truth table using AND gates that seems to work properly. The nand gate is a universal gate in the sense that any boolean function can be implemented by nand gates. If one or both inputs are LOW, a HIGH output results. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. Connection Diagram Function Table Y = ABC. XOR from NOR. We will only be looking at the first three gates. Flip-flops can be constructed by using NAND and NOR gates. If we construct AND, OR and NOT gate separately, Number of transistor in AOI gates are less. No gate may be used as a NOT. 1 AnswerImplement a half adder using pla?1 AnswerShow that a full adder can be constructed using two half adders. The ‘AC00 devices contain four independent 2-input NAND gates. Consider the circuit shown. This NAND gate LED flasher uses the SN74HC00N IC and two of its four NAND gates to from a multivibrator circuit. In fact, many of the first designs available to work on will be other simple logic gates. 74LS00 integrated circuit (IC). NAND and NOR gates possess a special property: they are universal. Connection Diagram Function Table Y = ABC. pptx), PDF File (. com Proudly. An OR Gate can be implemented using a combination of three NAND gates. Creating Multiplexers Using Logic Gates. when it comes to digital logic gates, you can make the component you need. If we take the example of a NAND gate, we find that it has two inputs and one output. IC 7400, NAND gate. Thus, SR flip-flop is a controlled Bi-stable latch where the clock signal is the control signal. Construct the truth table for the multiplexer and use a Kmap to obtain a minimized SOP expression for the multiplexer. The XNOR gate has the same relationship with the XOR gate that NAND has with AND and that NOR has with OR. This expresses the logical formula (A OR B) NAND (A NAND B). Here are NOT(inverter), AND, OR, NOR, and XOR made up of NAND gates. It contains four independent two-input NAND gates. Apply a common clock input to the new NAND gates. Otherwise it’s 0. Create a NOT gate using only NAND gates. 1 AnswerImplement a half adder using pla?1 AnswerShow that a full adder can be constructed using two half adders. So if any one or both inputs are low the output of NAND gate will be high. • Draw layout run a layout versus schematic (LVS) and simulate the extracted circuit. Here is an argument against XOR and XNOR as universal gates. To achieve this, first the logic function has to be written in Product of Sum (POS) form. NAND and NOR gates possess a special property: they are universal. LOGIC GATES: AND Gate, OR Gate, NOT Gate, NAND Gate AND OR NAND XOR XNOR Gate Implementation and Applications DC Supply Voltage, TTL Logic Levels, Noise Margin, Power Dissipation. Seven Basic Logic Gates. The output of the NAND gate is at logic 0 level only when each of the inputs assumes a logic 1 level. Equipments - Digital IC Trainer Kit b. NAND gate 1000 may also be used for NAND gates 906, 908, and 910 so as to output substantially uniform decoded signals Q0-Q3. Implementation of three basic gates using NAND and NOR gates is shown below -. Apparatus IC 7400, IC 7402, circuit board, power supply +5V DC, LED, connecting wires, soldering iron, cutter etc. ) can be implemented using only NAND gates. For synthetic biologists' creativity to be unleashed, basic circuits must become truly interchangeable, that is, modular and scalable. An AND gate outputs a 1 only if both its inputs were 1s. When it becomes low enough the output becomes HIGH and the buzzer sounds. A quad 2-input NAND gate is hardly the most exciting or exotic of components unless you have a pressing need for a bit of logic glue, so having secured a few we could hook up an LED or make an. The Diode Logic uses the fact that diodes conduct only in one direction multimeter music nand gate op. A NOT gate is made by joining the inputs of a NAND gate together. In the Bedrock Edition, the redstone wire on the side of the comparator is replaced by a repeater facing the comparator. Electronic NAND gates (along with NOR gates) are universal gates, which means that you can construct any other type of gate by using nothing but NAND gates combined in various ways. NAND Gate The NAND gate is a combination of an AND gate and NOT gate. NAND gate is a digital circuit that has two or more inputs and produces an output, which is the inversion of logical AND of all those inputs. My assignment is to do a paper design of 3- bit octal inputs to 7 segment common cathode decoder. 3 two-input NAND gates suggests using those to invert the 3 similar signals (windows and. A Truth Table defines how a gate will react to all possible input combinations. This NAND gate LED flasher uses the SN74HC00N IC and two of its four NAND gates to from a multivibrator circuit. (The number of gates required is shown in parentheses. • 2 - IC 7427 Triple 3-input NOR gates Introduction: Implementation with only NAND gates or NOR gates Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates. 7 Digital Logic Gates-2: NOR and NAND (using diodes) 1. Combining these two, the logical circuit to implement. This can be wasteful if only a few gates are required unless they are all the same type. operation of a NAND gate is represented in Table. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – E Tube CD74AC00E CD74AC00E 55°Cto125°C SOIC M Tube CD74AC00M – C to 125 SOIC – M AC00M Tape and reel CD74AC00M96. Why are NAND and NOR called universal gates? Simulate and wire with 74LS02; 10: Fill out the truth table for this circuit. Other common gates are NAND, NOR, XOR, XNOR (Equivalence). Because, in binary logic there are only two states, 1 and 0 or ‘on and off,’ NOT in the world of binary logic therefore means ‘the opposite of’. Meaning of NAND GATE. A NAND gate is a truly versatile logic gate. You can make every logic gate by using just NOR gates: Overall Comparison. Seven Basic Logic Gates. The SN74HC00N is a quad 2-input NAND gate in a PDIP package. OR, AND, NOT, NAND, NOR, XOR, XNOR - Logic Gates Calculation. By De Morgan's theorem, a two-input NAND gate's logic may be expressed as AB = A + B, making a NAND gate equivalent to inverters followed by an OR gate. NOR gate as universal gate. The NAND gate and the NOR gate can be said to be universal gates since combinations of them can be used to accomplish any of the basic operations and can thus produce an inverter, an OR gate or an AND gate. 2 Half Adder using NAND Gates, 3 Half Adder using NOR Gates, 4 Limitations If A and B are binary inputs to the half adder, then the logic function to calculate. Digital electronics relies on the actions of just seven types of logic gates, called AND, OR, NAND (Not AND), NOR (Not OR), XOR (Exclusive OR) XNOR (Exclusive NOR) and NOT. Here are NOT(inverter), AND, OR, NOR, and XOR made up of NAND gates. How to design a circuit from NAND-gates only,using a truth-table. In all the other cases, its output is high. These pairs can be removed and replaced with wire. The output is 1 only when all inputs are NOT 1. They are the basic building blocks of any digital system. A computer must store and process data. The pinout is shown on the left below. A XOR gate using NAND gates. Problems 3 & 4 are based on word statement.